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Schematic

 

 


The PIC manage the RAM, two internal ADC for CV-Wave/Bank selection, MIDI I/O and control the Zero Crossing Detector ( ZCD).The memory is a 4Mbits SRAM with a latency time of 70nsec. RAM and eprom read data cycles are almost identical. In 'RAM edit' mode, the PIC control 18 RAM adresses via a set of latches. A PIC port is wired to the RAM datas I/Os and to the output DAC. The DAC range is selected by a switch to be positive only '+10V' or symetrical 'AC' ' (+/-5V)

When the RAM is not used by the PIC for edition purposes, lower 8 bits of RAM adresses (lsb) are controled by the fast A/D converter.The Quantix-8 main input is a 8bits/1Mbps A/D converter with a Zero Crossing Detector for noise-free waveform changes. Both stages are very fast.

Hi adresses (msb) are set by the Bank / Waves CVs, converted to digital by two A/D converters inside the PIC. The selected waveform number is available on a 20 pins connector. Various systems can be connected here to display this value.

To limit power supply consumption the bank/waves display is binary made with 2mA leds. This way the +5V to feed logic circuits can be extracted from the +15V connector without any thermal problems.A 3V Lithium battery keep memory datas when power is off.

Download the Quantix-8 schematic only v1.0 (pdf)

 

 
 


Marc BAREILLE © 2005-2010